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Microarchitecture simulation is an important technique in computer architecture research and computer science education. It is a tool for modeling the design and behavior of a microprocessor and its components, such as the ALU, cache memory, control unit, and data path, among others. The simulation allows researchers to explore the design space as well as to evaluate the performance and efficiency of novel microarchitecture features. For example, several microarchitecture components, such as branch predictors, re-order buffer, and trace cache, went through numerous simulation cycles before they become common components in contemporary microprocessors of today. In addition, the simulation also enables educators to teach computer organization and architecture courses with hand-on experiences. For system-level simulation of computer hardware, please refer to the full system simulation. ==Classification== Microarchitecture simulation can be classified into multiple categories according to input types and level of details. Specifically, the input can be a trace collected from an execution of program on a real microprocessor (so called trace-driven simulation) or a program itself (so called execution-driven simulation). A trace-driven simulation〔Uhlig, R. A., & Mudge, T. N. (2004). Trace-Driven Memory Simulation: A Survey. ''ACM Computing Surveys'', 29(2), 128-170.〕 reads a fixed sequence of trace records from a file as an input. These trace records usually represent memory references, branch outcomes, or specific machine instructions, among others. While a trace-driven simulation is known to be comparatively fast and its results are highly reproducible, it also requires a very large storage space. On the other hand, an execution-driven simulation〔Burger, D., & Austin, T. M. (1997). The Simplescalar Tool Set Version 2.0. ''Computer Architecture News'', 25(3), 13-25.〕 reads a program and simulates the execution of machine instructions on the fly. A program file is typically several magnitudes smaller than a trace file. However, the execution-driven simulation is much slower than the trace-driven simulation because it has to process each instruction one-by-one and update all statuses of the microarchitecture components involved. Thus, the selection of input types for simulation is a trade-off between space and time. In particular, a very detailed trace for a highly accurate simulation requires a very large storage space, whereas a very accurate execution-driven simulation takes a very long time to execute all instructions in the program. Apart from input types, the level of details can also be used to classify the simulation. In particular, a piece of software that simulates a microprocessor executing a program on a cycle-by-cycle basis is known as cycle-accurate simulator, whereas instruction set simulator only models the execution of a program on a microprocessor through the eyes of an instruction scheduler along with a coarse timing of instruction execution. Most computer science classes in computer architecture with hand-on experiences adopt the instruction set simulators as tools for teaching, whereas the cycle-accurate simulators are deployed mostly for research projects due to both complexities and resource consumption. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Microarchitecture simulation」の詳細全文を読む スポンサード リンク
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